Logic minimization is one of the most important parts of the computer-aided design (CAD) of VLSI systems. The problem of logic minimization can be decomposed into two sub-problems [1]. The first sub-problem deals with finding all the prime implicates of a given logic function. The second sub problem is to find the minimal cover of the function by choosing that subset of the prime implicates which is least expensive with respect to some pre-defined criteria. We are presenting a new algorithm for the first sub-problem of logic minization. Out implicates without first expanding or disjoining the logic function to complete midterm level. Instead, it decomposes the function up to only an absolute minimal intermediate set of implicates. This contributes a three-fold improvement in the first phase of the minization process. In majority of the cases, it saves time incurred in expanding the function. Secondly, it avoids potential exponential growth of the midterm table. Thirdly, it greatly reduces the number of comparisons-cum-combination steps in creating the prime-implicates. The algorithm was tested against various benchmarks. It outperforms most of the classical methods presently used for the first phase of logic minimization.