Analog signal processing is ideal for high frequency and real time applications due to instantaneous calculations. Analog domain also affords easier custom chip design, reduced component count, reduced battery drain etc. It was desired to develop an analog signal processing system which is as programmable and adaptable as a digital filtering system. Several designs of analog adders and multipliers are available in literature with digital counterparts. Continuously extendible and controllable delay lines are very difficult to be implemented in analog form. This important requirement led to the search for an analog delay line which is easy to implement in a VLSI chips and offers a controllable delay. An analog delay line for signal processing is discussed in this paper in two parts. The first part deals with the theory and implementation of analog delay line discussed in literature. The second part contains description of an innovative design and implementation of a delay line based on operational amplifiers and multiplexers.