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Hardware component inclusion, synthesis and realization in digital design.

Author(s)
Muhammad Kamran Department of Computer Science and Engineering, School of Computer Science and Technology, Beijing Institute of Technology, Beijing, China
Shi Feng Department of Computer Science and Engineering, School of Computer Science and Technology, Beijing Institute of Technology, Beijing, China
Abdul Fattah Chandio Department of Computer Science and Engineering, School of Computer Science and Technology, Beijing Institute of Technology, Beijing, China
Abstract
Prior to the real time application of digital circuit for some specific application or implementation on FPGA, a careful investigation about circuit optimization and algorithmic steps is to be considered. Behavioral design is presented in this paper for evolving innovation of digital circuit in which PING PONG RAM is involved operating on the principle of CWCR (Concurrent Write Concurrent Read). This particular digital circuit is to be appended in a preprocessor for image compression based on scalable DCT algorithm. Moreover, an approach is also discussed to deal with large hardware components and data for image compression which may be applicable as well to any other ASIC or FPGA design with similar requirements. This paper presents the technique to complete synthesis in considerably lesser time with appropriate substantiation. It also compares the output pixels extracted from design theoretically and experimentally and found feasible to authenticate the proposed architecture.
Publication Details
Page(s) 223-230
DOI DOI not available
Published Journal: Mehran University Research Journal of Engineering and Technology, Volume: 25, Issue: 3, Year: 2006

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