A processor based implementation of lapped biorthogonal transform for JPEG XR compression on fpga.

M. R. Rehman; G. Raja

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A processor based implementation of lapped biorthogonal transform for JPEG XR compression on fpga.

Author(s)

M. R. Rehman Department of Electrical Engineering, University of Engineering & Technology, Taxila, Pakistan

G. Raja Department of Electrical Engineering, University of Engineering & Technology, Taxila, Pakistan

Abstract

This paper describes a new methodology for implementation of Lapped Biorthogonal Transform (LBT) used in JPEG XR Image compression. Due to sequential nature of LBT, we present a processor based design that executes the instructions of LBT at higher speed. This design can be used in low cost battery operated imaging devices and supports easy up-gradation. We have tested the design on Xilinx Virtex-II Pro FPGA that includes built in PowerPC 405 core which is a 32-bit implementation of RISC PowerPC embedded-environment architecture.

Publication Details

Page(s) 181-186

DOI DOI not available

Published Journal: Nucleus, Volume: 49, Issue: 3, Year: 2012

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