Network-on-Chip (NoC or NOC) is an approach towards designing the communication system between cores in a System-on-a-Chip (SOC). In this paper a new routing algorithm has been proposed for two dimensional grid NoC which finds the shortest path between the source and destination core in a NoC and also finds the most suitable path in case a node during the data transmission fails. Traditionally bus structure was used as a solution of interconnection between different cores. Because of the advancements in processor technologies, more cores are being placed on a SOC. Bus structure is narrow which does not allow flow of high traffic and causes delay in data traffic. In NoC the bus structure has been ruled out by network topologies which are similar to the Internet and communication happens between each core by transmitting packetized data over the network. Similar to the network of computers, a NoC contains devices like cores and traces which uses the network to communicate and traces are used to connect core with other cores and other devices in a NoC. The most essential thing in the designing of a NoC is the routing algorithm and the topology of the network. Cores route the data traffic according to the routing algorithm they are using. There are many routing algorithms and network topologies which are used according to the requirement. This paper focuses on comparison of all the state of the art routing algorithms with each other and our new proposed algorithm.