Field the discrete wavelet transforms is powerful tool in data compression, especially after being adopted by the international standards organization in the MPEG-4 and JPEG 2000 multimedia compression standards. However, the transform is computationally intensive and thus a fast and hardware-based implementation is crucial to achieve real-time performance. In this study, we report on a single chip hardware implementation of the forward and inverse discrete wavelet transforms. The implementation is based on a parallel polyphase realization of the wavelet filter banks using a large filed programmable gate array (FPGA). Performance results show that the FPGA based polyphase realization of the wavelet filter banks leads to a computationally efficient implementation compared with alternative conventional implementations. Finally, we show the single chip FPGA Implementation outperforms software implementations of the transform significantly.