Power Optimization using Low-transition Rate Based LFSR Pattern Generator.

Y. A. Durrani

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Power Optimization using Low-transition Rate Based LFSR Pattern Generator.

Author(s)

Y. A. Durrani Electronics Engineering Department, University of Engineering & Technology, Taxila, Pakistan

Abstract

Dynamic power dissipation has been increased exponentially with the excessive switching of nodes inside the digital electronic circuits. Power dissipation on these circuits are highly input pattern dependent. This work exploits the generation of efficient input patterns with the ability to reduce maximum switching activity in the circuit by using linear feedback shift register (LFSR) technique. This approach is further modified by the insertion of the low-transition density with highly correlated signals in the LFSR-based patterns. The transition between different patterns reduces the substantial amount of switching activity in the circuit. Reduction in transition results the low dynamic power consumption. Power consumption have been estimated by using standard ISC A S 8 5 and 8 9 bench mark circuits . T h e experimental results demonstrate that power can be significantly optimized using this approach.

Publication Details

Page(s) 60-65

DOI DOI not available

Published Journal: Technical Journal, Volume: 22, Issue: 2, Year: 2017

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Keywords

Switching Activity, benchmark circuits, power optimization, Digital Patterns Generator