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Low-power integrated circuit design optimization approach.

Author(s)
Y. A. Durrani Electronics Engineering Department, University of Engineering and Technology (UET), Taxila, Pakistan
Abstract
In this tutorial survey, the paper presented a general review of the state-of-the-art techniques in optimizing the power dissipation on digital electronic systems. The source of power dissipation is focused on complementary metal-oxide semiconductor (CMOS) circuits. This basic information cannot be implemented directly to optimize power dissipation due to the low abstraction level, but will be helpful to solve the power related problem. The major power factors are considered for the hardware and the software with the most trustful approaches of all levels of the design flow. The paper review is organized in three different types of digital system design: interpret conceptually, design flow, and management.
Publication Details
Page(s) 32-42
DOI DOI not available
Published Journal: Technical Journal, Volume: 21, Issue: 1, Year: 2016

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