A video enhancement algorithm for low-lighting environment using field programmable gate array (FPGA) architecture. | [NED University Journal of Research • 2016]

Author(s):

1. Zubair Bashir: Department of Electrical Engineering, University of Engineering and Technology, Taxila, Pakistan

2. Gulistan Raja: Department of Electronic Engineering, University of Engineering and Technology, Taxila, Pakistan

3. Muhammad Obaid Ullah: Department of Electrical Engineering, University of Engineering and Technology, Taxila, Pakistan

Abstract:

An implementation of field programmable gate array (FPGA) architecture is proposed in this paper which is able to perform real time enhancement on low lighting or nonlinear lighting video. The proposed architecture is synthesised on Virtex-6 family of FPGA (XC6VLX75T FF884). It was found that this architecture can compute 200 megapixels/sec in real time and is capable of enhancing the 640x480 resolution frame in 172.65 pec. The proposed architecture carried out multiple level-dependent computations by using pipelining that can achieve high throughput which is favourable for real time applications.

Page(s): 81-89

DOI: DOI not available

Published: Journal: NED University Journal of Research, Volume: 8, Issue: 4, Year: 2016

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