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Framework for Live Migration of FPGA based ECB-mode AES-128 accelerator
Author(s):
1. Yame Asfia: National University of Sciences and Technology Islamabad,Pakistan
2. Sajid Gul Khawaja: National University of Sciences and Technology Islamabad,Pakistan
3. Muhammad Asad: Sir Syed CASE Institute of Technology Islamabad,Pakistan
4. Alina Mirza: National University of Sciences and Technology Islamabad,Pakistan
Abstract:
Virtual Machines in cloud datacentres are live migrated for assuring service availability in the event of errors and maintenance. FPGA based hardware accelerators must also be live migrated for the same reasons. AES is widely accepted encryption standard and is therefore commonly used for security provision. In this paper, we propose a novel live migration technique for migration of FPGA accelerated ECB mode AES128 encryption algorithm using the concept of pipelining which gracefully migrates the application to the destination. The proposed methodology is explained with the help of outer-round only pipelined design of AES-128. Experiments show that the proposed method can reduce downtime nearly to zero, ensuring the service's availability at maximum.
Page(s): 1-1
DOI: DOI not available
Published: Journal: IEEE International Conference on Digital Futures and Transformative Technologies (ICoDT2) May 24-26, 2022 (Book of Abstracts), Volume: 1, Issue: 1, Year: 2022
Keywords:
Live Migration , FPGA based hardware , AES128 accelerator
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