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Timing Analysis of Parallel Software Applications for Multi-core Embedded Systems
Author(s):
1. Muhammad Waqar Aziz: Department of Computer Science, CECOS University of IT and Emerging Sciences, Pakistan
2. Syed Abdul Baqi Shah: Science and Technology Unit, Umm Al-Qura University,Saudi Arabia
Abstract:
Real-Time Embedded Systems (RTES) must be verified for their timing correctness where knowledge about the Worst-Case Execution Time (WCET) is the building block of such verification. Traditionally, research on the WCET analysis of RTES assumes sequential code running on single-core platforms. However, as computation is steadily moving towards using a combination of parallel programming and multi-core hardware, new challenges in timing analysis, and especially in WCET analysis need to be addressed. Towards this direction, this paper presents the Timing Analysis tool for Parallel Embedded Software (TAPES). The proposed tool allows the WCET estimation of parallel applications running on multi-core hardware through a hybrid measurement-based analysis method, that combines the program flow and timing information into an Integer-Linear Programming problem to estimate the WCET. In addition, the TAPES tool allows the measurement of the longest end-to-end execution time by capturing the timing properties of the parallel executing threads using time-stamped execution traces of the program. The applicability of the proposed tool is demonstrated through the timing analysis of an embedded parallel benchmark suite - the ParMiBench. The results showed that the calculated WCET estimates have significantly less over-approximation compared to the measured WCET estimates. The comparison of the calculated and measured WCET estimates showed modest over-estimates.
Page(s): 30-42
DOI: DOI not available
Published: Journal: Pakistan Journal of Engineering and Applied Sciences, Volume: 22, Issue: 0, Year: 2018
Keywords:
Multicore Embedded Systems , Parallel Embedded Software , WorstCase ExecutionTime Analysis
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