Pakistan Science Abstracts
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To overcome the bottlenecks of complicated arithmetic operations in digital system.
Author(s):
1. Muhammad Kamran: Department of Computer Science and Engineering, Beijing Institute of Technology, Beijing, China
2. Shi Feng: Department of Computer Science and Engineering, Beijing Institute of Technology, Beijing, China
3. Suhail Aftab Qureshi: Department of Electrical Engineering, University of Engineering & Technology, Lahore, Pakistan
Abstract:
Digital designs are often implemented with most relaxed conditions with respect to operational steps, area and processing speed. During design, some times multiplication and division operations are encountered. Simulation tools have limitations to perform them efficiently causing loss of accuracy in obtaining results. Proposed paper discusses the effects of multiplication operations in digital design along with the solution of such problems using CSHM (Computational Sharing Multiplier). Such multiplications are being faced especially in transformation algorithms particularly utilized in image compression processes. CSHM will provide a solution of multiplying constant numbers with a binary vector to obtain result. Instead of physical multiplier, shift and add operations are performed which simplifies the area complexity of design. Multiplication units are considered as bottleneck of design and these operations are required to be simplified. Effective discussion and different multiplication techniques are presented in this paper to provide guide lines for hardware designers working in the filed of DSP.
Page(s): 6-9
DOI: DOI not available
Published: Journal: New Horizons: Journal of the Institution of Electrical & Electronics Engineers Pakistan, Volume: 53, Issue: 0, Year: 2006
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