Author(s):
1. Rimsha Tariq:
National University of Sciences and Technology Islamabad,Pakistan
2. Sajid Gul Khawaja:
National University of Sciences and Technology Islamabad,Pakistan
3. Muhammad Usman Akram:
National University of Sciences and Technology Islamabad,Pakistan
4. Farhan Hussain:
National University of Sciences and Technology Islamabad,Pakistan
Abstract:
Data compression is an important algorithm which has found its use in modern day algorithms such as Convolutional Neural Networks (CNNs). Reconfigurable platforms (like FPGAs) have strong capabilities to implement time complex tasks like CNNs, however, these algorithms present a big challenge due to high resource demand. Data compression is one of the most utilized techniques to reduce memory utilization in FPGAs. The weights of CNN architecture are usually encoded to store in FPGA. In this paper, we propose design of an efficient decoder based on Canonical Huffman that can be utilized for the efficient decompression of weights in CNN. The proposed design makes use of Hash functions to effectively decode the weights eliminating the need for searching dictionary. The proposed design decodes a single weight in a single clock cycle. Our proposed design has a maximum frequency of 408.97MHz utilizing 1% of system LUTs when tested for Aritix 7 platform.
Page(s):
1-1
DOI:
DOI not available
Published:
Journal: IEEE International Conference on Digital Futures and Transformative Technologies (ICoDT2) May 24-26, 2022 (Book of Abstracts), Volume: 1, Issue: 1, Year: 2022
Keywords:
Reconfigurable Architecture
,
Realtime Decoding
,
Canonical Huffman Codes
References:
References are not available for this document.
Citations
Citations are not available for this document.